A nanowire is a relatively thin wire, for example, with a diameter or width measured in nanometers (nm). Nanowires can have diameters or widths such as, for example, about 4 nm to 10 nm. Nanowires can be a viable device option instead of fin field-effect transistors (FinFETs). For example, a nanowire can be used replace the FinFET device architecture. Nanowires enable a gate to completely wrap around the channel to improve gate control and lower drain-induced barrier lowering (DIBL) and sub-threshold swing. Nanowires can have a smaller perimeter than fins, but also larger external resistance due to an under-spacer component. Complementary metal-oxide semiconductor (CMOS) scaling can be enabled by the use of stacked nanowires, which offer superior electrostatics and higher current density per footprint area than FinFETs.
With respect to nanowire devices, bulk substrates, when compared to silicon-on-insulator (SOI) substrates, offer low cost. However, manufacturing a nanowire device on a bulk substrate may lead to difficulties in controlling device characteristics. For example, when starting with a bulk substrate, parasitic capacitance can occur between the substrate and source/drain and channel regions that are not isolated from the substrate. Parasitic capacitance degrades circuit performance and consumes power.